The present embodiments relate to printed circuit board design. More specifically, the embodiments relate to dynamic resolution of a route exception based on a generated boundary corresponding to a voltage split.
Various electronic products are embedded with a printed circuit board (PCB). The PCB mechanically and electrically supports component(s) which provide functionality to an electronic product. The PCB may include multiple layers supporting a desired functionality. The electrical support includes a conductive track, a pad, a vertical interconnect access (VIA) and/or other features which interconnect the component(s). In order to properly design the PCB, multiple factors have to be considered. The factors may be functionality of an element, configuration of the element, functionality of the PCB, configuration of the PCB, etc.
Computer aided design (CAD) software may be utilized by a PCB designer to support a design of the PCB which conforms to the multiple factors. The CAD software represents different component(s) as digital object(s) having a physical shape and corresponding connection requirements. The design process starts with defining PCB parameters such as functionality, component(s) to be supported, quantity of layers, and/or size. The PCB design process positions the component(s) on the PCB utilizing the CAD software. A dataset comprising one or more networks of connections (e.g., a net) is created from the defined functionality and/or component(s). Each net describes connectivity of pins in the PCB corresponding to connections on the component(s) assigned to the net. A single net provides similar electrical support to all pins within the net. During design of the PCB, each net is provided with interconnections connecting all pins of the net by a wire(s) (e.g., conductive trace) and/or a VIA while avoiding overlap with a wire and/or a VIA of a second net. Each net has to be designed in accordance with the factors in order to assure the PCB will operate properly.